Minimum qualifications:

• Bachelor's degree in Materials, Mechanical, Electrical Engineering, a related field, or equivalent practical experience.
• 5 years of experience on advanced chip package technologies for pin count, power, and speed applications.
• 5 years of experience in package and substrate development for production.

Preferred qualifications:

• Experience in developing new technologies and driving innovation.
• Experience in assembly houses or wafer foundries.
• Understanding of multidisciplinary interactions between packaging technology, chip package electrical design, thermal and mechanical performance, and manufacturability/reliability.
• Understanding of advanced foundry process nodes and their interactions with package reliability and different package technologies.
• Knowledge of 2.5D and 3D packaging technologies, and advanced substrate technologies for HPC applications.
• Familiarity with general package assembly process, packaging materials, and reliability requirements (component and board level).

About the job

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

As a Chip Package Technologist in the Chip Implementation team, you will work on package development of broad chip package technologies. You will be directing all technical aspects of package design, assembly process, package materials and reliability tests. You will perform early feasibility studies using test vehicles, creation of specifications and provide guidance for thermal, mechanical, electrical and package substrate design. Your job functions also involve leading package design reviews, solving all technical issues associated with package reliability, process, thermal, and electrical issues. As chip package development lead, you will also work closely with multi-functional cross teams from different organizations and various vendors to incorporate their inputs into package development and successful roll out for production.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

The US base salary range for this full-time position is $150,000-$223,000 bonus equity benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

• Develop and qualify high-performance substrate solutions for Google TPUs.
• With chip architecture and design teams, define the feasible boundaries of chip construction in the early stages of TPU definition.
• Drive advanced packaging solutions from concept to high volume production comprehending manufacturing, electrical, thermal, and mechanical requirements.
• Establish package development engineering plans and conduct experiments using mechanical/thermal test vehicles to determine package materials. Generate assembly process and reliability test plans.
• Drive collaboration with multi-functional internal teams, OSATs and material suppliers to deliver chip package solutions for production.