Hardware Engineer - Design and Verification
San Jose, California
Employer: Experis
Industry:
Salary: Competitive
Job type: Part-Time
Experis is seeking a Hardware Engineer on behalf of our global manufacturing client to work onsite in the San Jose, CA area.
Duties and Responsibilities
Critical Skills
Qualification Requirements
Duties and Responsibilities
- Interface in cross functional teams to ensure the design meets all firmware, diagnostic and system level requirements.
- Participate in architecture definition, design reviews, requirements generation of SSD products.
- Perform basic Signal and power integrity measurements
- Document and communicate results with cross functional counterparts.
- Simulate and analyze design proposals, review results and provide recommendations on optimal design practices to other design engineers.
- Experienced in designing hardware for large scale manufacture, including DFx and low-cost considerations
- Hardware design, worst-case analysis, simulations, capture schematic, de-rating and assume complete ownership of the SSD hardware throughout the product lifecycle.
- PCB back-end process: defining stack-up and via technologies, part placement, setting design constraints, signal integrity and power integrity analysis
- Works proactively with cross functional team members during design, verification as well as on RMAsfpga
Critical Skills
- Self-motivated. Desire to take on challenges. Result-driven and details oriented.
- Good interpersonal and communication skills are a must.
- Good in transmission line fundamentals. Understand the fundamentals of time-domain vs. frequency-domain.
- In depth knowledge in circuit designs, as well as semiconductor design.
- Good PCB design experience on high-speed signals routing guideline and review, power copper routing and review, design for EMI/ESD protection.
- Design for signal integrity, including SerDes, power and interconnect.
- Develops solutions to complex technical problems, which require ingenuity and creativity.
- Analog design using simulation e.g. SPICE (or equivalent).
- Practical experience with design tools or equivalent:
- Cadence Sigrity, Allegro Power-Aware SI
- Mentor Graphics HyperLynx
- Practical lab SI analysis experience using equipment or equivalent
- High-bandwidth measurements (20-35GHz) via:
- Teledyne Lecroy SDA820Zi-B Oscilloscope
- Agilent MSO-X 92004A Oscilloscope
- PCIe Compliance equipment (requires also using one of the following test equipment)
- Teledyne Lecroy PER-R008-S01-X Protocol Aware Bit Error Rate Tester
- Keysight J-BERT M8041A # Protocol Aware Bit Error Rate Teste
Qualification Requirements
- BS in Electrical Engineering required; MS in Electrical Engineering is preferred
- Good written and verbal communication
- Good problem-solving skills
- Experience in hardware architecture, design, signal integrity and power supply design.
- This would include modeling and simulation for high speed signaling implementations and power supply design including power distribution network (PDN) simulations.
- A successful candidate will have a good working knowledge of state-of-the-art memory device technologies, interfaces such as SATA, SAS, PCIe Gen 3&4, ONFI and implementation techniques required for high-speed interfaces.
- In addition, this candidate will have a good working knowledge of Buck and boost power supply designs.
- Experience with PCB design tools (Cadence PCB design and analysis, including Si/Pi).
- Expertise in the design for optimum signal and power integrity as well as hands-on lab experience.
Created: 2024-09-01
Reference: 325554
Country: United States
State: California
City: San Jose
ZIP: 95118
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