PMIC Architect, #1079 (San Jose, CA)

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional PMIC Chip Architect to join our Bufferchip team in San Jose, California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.

As a PMIC Chip Architect, you will work on creating the most advanced PMIC technology in the world, take the ownership of defining the circuit architecture, and execute analog circuit design toward production.

Location: San Jose, CA (Headquarters) or any US Rambus locations (Arizona, California, Massachusetts, New York, Ohio, Oregon, Texas)

Responsibilities:

• Architecture and Design of PMIC
• Design state-of-the-art multiphase DC-DC converter based PMIC to enable the industry leading performance and energy efficiency
• Work with Chip Lead to define chip and block-level specifications
• Carry out circuit design and verification
• Work closely with layout team on physical implementation
• Drive and contribute to silicon bench characterization, support production ATE test development
• Interact with technical leaders of the company and senior staff in engineering, marketing, and corporate development to help ensure successful development of high value technologies and PMIC products

Requirements/Qualifications:

• MS EE and 10+ years or PhD EE and 7+ years' experience of CMOS analog/mixed-signal circuit design
• Deep knowledge and hands-on experience in developing power management IC and DC/DC converter circuitry, such as circuit architecture choice, transistor-level analog design, verification, bench and production testing, ESD, reliability
• Solid fundamentals in transistor-level analog CMOS design, including operational amplifiers, comparators, references, oscillators, etc.
• Have extensive experience in supervising and guiding layout design for critical analog IP
• Industry design experience in highly efficient DC-DC converter
• Strong knowledge and experience in DC-DC converter stability analysis and modeling is highly desired
• Experience in analog circuit IP that require trimming, with experience on DFT, DFM, and BIST is a plus
• Experience in behavioral modeling of analog building blocks using SystemVerilog, Verilog, Verilog-A, Matlab, Simulink

About Rambus

Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership.

Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.

Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, you may let us know in the application.

For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.