Insight Global is looking for a Hardware Integration Lead to join their team in Azusa. This individual will contribute to the integration, development, and production of digital electronic equipment, integrated circuitry, and other hardware systems. This individual will be responsible for the debugging, integration, testing, development, and programming of a set of 6 FPGAs for an integral program within the Azusa location. They will be hands on reading and debugging VHDL code in a lab setting and will be leading a group of engineers to deliver on this body of work. This individual will be supporting onsite in Azusa, CA, working in the lab, and working with reprogrammable FPGAs throughout the life of this engagement. The individual will work cross-functionally with individuals throughout the program, to support the successful hardware integration and testing of these FPGAs. This position will work a 9/80 A schedule.

We are a company committed to creating diverse and inclusive environments where people can bring their full, authentic selves to work every day. We are an equal opportunity/affirmative action employer that believes everyone matters. Qualified candidates will receive consideration for employment regardless of their race, color, ethnicity, religion, sex (including pregnancy), sexual orientation, gender identity and expression, marital status, national origin, ancestry, genetic factors, age, disability, protected veteran status, military or uniformed service member status, or any other status or characteristic protected by applicable laws, regulations, and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or recruiting process, please send a request to HR@insightglobal.com .

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Required Skills & Experience
• 10+ years of experience within hardware engineering, specifically within Hardware Integration
• Strong experience with VHDL, specifically reading and debugging VHDL Designs
• Strong experience with Ruby or any other scripting language, and ability to debug test scripts
• Strong expertise working with FPGAs and performing hardware integration and debugging in a lab environment.
• Expertise utilizing Jira/Confluence/DOORS to manage requirements, and lead team for project and task scheduling.
Active DoD Secret Clearance

Nice to Have Skills & Experience

Experience with COSMOS interface system.

Benefit packages for this role will start on the 31st day of employment and include medical, dental, and vision insurance, as well as HSA, FSA, and DCFSA account options, and 401k retirement account access with employer matching. Employees in this role are also entitled to paid sick leave and/or other paid time off as provided by applicable law.