Maxonic maintains a close and long-term relationship with our direct client. In support of their needs, we are looking for a ASIC Engineer

Job Description:

Job Title: ASIC Engineer

As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on developing innovative ASIC solutions for Facebook's data center applications. You will be responsible for the verification closure of a design module or sub-system from test-planning, UVM based test bench development to verification closure. Along with traditional simulation, you will be able to use other approaches like Formal and Emulation to achieve a bug-free design. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success.

Responsibilities

• Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification

• Develop functional tests based on verification test plan

• Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage

• Debug, root-cause and resolve functional failures in the design, partnering with the Design team

• Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality

• Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry

Minimum Qualifications

• Track record of 'first-pass success' in ASIC development cycles

• Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.

• 10+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification

• 10+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies

• Experience in one or more of the following areas along with functional verification - SV Assertions, Formal, Emulation

• Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments

• Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle

Preferred Qualifications

• Experience in development of UVM based verification environments from scratch

• Experience with Design verification of Data-center applications like Video, AI/ML and Networking designs

• Experience with revision control systems like Mercurial(Hg), Git or SVN

• Experience with verification of ARM/RISC-V based sub-systems or SoCs

• Experience with IP or integration verification of high-speed interfaces like PCIe, DDR, Ethernet

• Experience working across and building relationships with cross-functional design, model and emulation teams

About Maxonic:

Since 2002 Maxonic has been at the forefront of connecting candidate strengths to client challenges. Our award winning, dedicated team of recruiting professionals are specialized by technology, are great listeners, and will seek to find a position that meets the long-term career needs of our candidates. We take pride in the over 10,000 candidates that we have placed, and the repeat business that we earn from our satisfied clients.