Summary
In this highly transparent role, you will support the integration of 3rd party analog IP in the SOCs developed by Apple! We verify that the IP work meets Apple's high quality standards and get flawlessly integrated! We work closely with different multi-functional teams within Apple as well as with external vendors. Occasional travel might be required.

Key Qualifications
Experience in RTL design, verification or integration

Deep knowledge and experience with front-end tools such as simulation, synthesis, lint, logic equivalence, static timing analysis, CDC, RDC, and UPF

Familiarity with SOC design flow and verification methodologies

Good understanding of DFT requirements for SOCs

Experience writing Verilog, System Verilog, SVA hardware description languages

Experience with Verilog modeling and model validation is a plus

Experience with standards like PCI Express, MIPI, USB or DisplayPort is a plus

Excellent written and verbal communication skills

Strong initiative and ownership of responsibilities, productive, and able to meet deadlines

Description
We are a small team responsible for 3rd party analog IP. We are looking for someone to define and specify result requirements for analog IP provided by external vendors, driving discussions with vendors, regarding these requirements. You will review their designs and modeling methodology and ,also, run QA checks on incoming IP work. You would support the Apple SOC front-end and backend design teams for integrating the analog IP.

Education & Experience
BSEE required plus 10+ years of relevant experience or equivalent

Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.

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